VHDL TD 4

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library ieee;
use ieee.std_logic_1164.ALL;

entity compteur_mod6 is
	port(	H,RESET	: in std_logic;
		S	: out std_logic
	);
end compteur_mod6;

architecture logic of compteur_mod6 is
	signal Q, D : std_logic_vector(2 downto 0);
begin
	D(0) <= NOT(Q(0));
	D(1) <= (Q(0) XOR Q(1)) AND NOT(Q(2));
	D(2) <= (Q(0) AND Q(1)) OR (NOT(Q(0)) AND Q(2));
	
	process(H) is
	begin
		if(H'event AND H='1') then
			if RESET='1' then
				Q <= "000";
			else
				Q <= D;
			end if;
		end if;
	end process;
	
	S <= (Q(0) AND Q(1)) OR Q(2);
end logic;

architecture behav of compteur_mod6 is
	signal Q : integer range 0 to 5;
begin
	process(H) is
	begin
		if(H'event AND H='1') then
			if RESET='1' then
				Q <= 0;
			else
				Q <= Q+1;
				if Q=5 then
					Q <= 0;
				end if;
			end if;
		end if;
	end process;
	
	S <= '0' when Q<3 else '1';
end behav;

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library ieee;
use ieee.std_logic_1164.ALL;

entity compteur_decompteur_mod6 is
	port(	H,RESET	: in std_logic;
		UP_DOWN	: in std_logic;
		S		: out std_logic
	);
end compteur_decompteur_mod6;

architecture behav of compteur_decompteur_mod6 is
	signal Q : integer range 0 to 5;
begin
	process(H) is
	begin
		if(H'event AND H='1') then
			if RESET='1' then
				Q <= 0;
			elsif UP_DOWN='1' then
				Q <= Q+1;
				if Q=5 then
					Q <= 0;
				end if;
			else -- UP_DOWN='0'
				Q <= Q-1;
				if Q=0 then
					Q <= 5;
				end if;
			end if;
		end if;
	end process;
	
	S <= '1' when (UP_DOWN='1' AND Q=5) OR (UP_DOWN='0' AND Q=0) else '0';
end behav;

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library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;

entity compteur_decompteur_modvar is
	port(	H		: in std_logic;
		UP_DOWN	: in std_logic;
		MODULO	: in std_logic_vector(3 downto 0); -- MODULO doit valoir n-1 pour un compteur modulo n
		LOAD	: in std_logic;
		LOAD_VALUE : in std_logic_vector(3 downto 0);
		S		: out std_logic
	);
	-- LOAD='1' et LOAD_VALUE="0000" est equivalent a un RESET
end compteur_decompteur_modvar;

architecture behav of compteur_decompteur_modvar is
	signal Q : integer range 0 to 15;
begin
	process(H) is
	begin
		if(H'event AND H='1') then
			-- maj de de Q
			if LOAD='1' then
				if LOAD_VALUE >= MODULO then
					Q <= to_integer(unsigned(MODULO));
				else
					Q <= to_integer(unsigned(LOAD_VALUE));
				end if;
			elsif UP_DOWN='1' then
				Q <= Q+1;
				if Q=to_integer(unsigned(MODULO)) then
					Q <= 0;
				end if;
			else -- UP_DOWN='0'
				Q <= Q-1;
				if Q=0 then
					Q <= to_integer(unsigned(MODULO));
				end if;
			end if;
		end if;
	end process;
	-- maj de S
	S <=
		'1' when
			(UP_DOWN='1' AND Q=to_integer(unsigned(MODULO))) OR
			(UP_DOWN='0' AND Q=0)
		else '0';
end behav;