VHDL TD 6

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library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;

entity ROM_128_8 is
	port(	ADD	: in  std_logic_vector(6 downto 0);
		DATA	: out std_logic_vector(7 downto 0)
	);
end ROM_128_8;

architecture behav of ROM_128_8 is
	type memory is array (0 to 127) of std_logic_vector(7 downto 0);
	signal MEM : memory;
begin
	MEM(0) <= "00000001";
	MEM(1) <= "00000010";
	MEM(2) <= "00000100";
	MEM(3) <= "00001000";
	MEM(4) <= "00010000";
	MEM(5) <= "00100000";
	MEM(6) <= "01000000";
	MEM(7) <= "10000000";
	-- mieux: operateur := (voir sur internet)
	
	DATA <= MEM(to_integer(unsigned(ADD)));
end behav;

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library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;

entity RAM_SP_32_8 is
	port(	ADD		: in  std_logic_vector(5 downto 0);
		DATA_IN	: in  std_logic_vector(7 downto 0);
		H, ENABLE	: in std_logic;
		RW		: in std_logic; -- '0' pour lire, '1' pour ecrire
		DATA_OUT	: out std_logic_vector(7 downto 0)
	);
end RAM_SP_32_8;

architecture behav of RAM_SP_32_8 is
	type memory is array (0 to 31) of std_logic_vector(7 downto 0);
	signal MEM : memory;
begin
	process(H) is
	begin
		if(H'event AND H='1') then
			if ENABLE='1' then
				null;
			elsif RW='0' then -- read
				DATA_OUT <= MEM(to_integer(unsigned(ADD)));
			else -- RW='1', write
				MEM(to_integer(unsigned(ADD))) <= DATA_IN;
				DATA_OUT <= "00000000"; -- pas important
			end if;
		end if;
	end process;
end behav;

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library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;

entity RAM_DP_32_8 is
	port(	H, WRITE_ENABLE		: in std_logic;
		READ_ADD, WRITE_ADD	: in  std_logic_vector(4 downto 0);
		DATA_IN			: in  std_logic_vector(7 downto 0);
		DATA_OUT		: out std_logic_vector(7 downto 0)
	);
end RAM_DP_32_8;

architecture behav of RAM_DP_32_8 is
	type memory is array (0 to 31) of std_logic_vector(7 downto 0);
	signal MEM : memory;
begin
	process(H) is
	begin
		if(H'event AND H='1') then
			if WRITE_ENABLE='1' then --write
				MEM(to_integer(unsigned(WRITE_ADD))) <= DATA_IN;
			end if;
		end if;
	end process;
	
	DATA_OUT <= MEM(to_integer(unsigned(READ_ADD)));
end behav;